Digital compensation for offset and gain correction

ABSTRACT

A system and method for providing digital compensation and correction for an amplifier. The system is configured to provide a digitally compensated representation of a first amplified analog signal indicative of a first parameter based on a digital representation of the first amplified analog signal and a digital representation of a second analog signal indicative of a second parameter. The digitally compensated representation of the first amplified analog signal is determined by applying a pre-stored compensation factor to an offset adjustment calculation for the second parameter to provide a compensated offset adjustment. The compensated offset adjustment is combined with an adjusted gain to provide an offset and gain correction for weighting the first parameter to provide the digitally compensated representation of the first parameter. The adjusted gain can be determined by applying a pre-stored gain factor data to the second parameter.

TECHNICAL FIELD

The present invention is generally directed to a system for signalprocessing and more specifically to systems and methods for digitalcompensation and gain correction.

BACKGROUND OF THE INVENTION

An ideal amplifier provides a constant gain and offset over a wide rangeof temperatures without the need for feedback control. However, for areal amplifier, the gain and offset vary due to changes in temperatureand linearity effects. For example, as operating temperature increases,gain tends to decrease. To overcome temperature effects, the gain andoffset of the amplifier is actively compensated.

Gain variations due to temperature changes can be actively compensatedusing a closed loop feedback circuit. The output power is compared to areference and any deviation of the output power from the reference powercauses a control circuit to adjust the amplifier's gain. This automaticgain compensation technique works as long as the amplifier's behavioracross a temperature gradient can be determined or predicted. However,such circuits are difficult to mass produce reliably and often requiremanual trimming to account for deviations among the closed loopcomponents and the out of loop temperature effects.

Similarly, temperature dependent resistive networks or a closed loopfeedback circuit can be used to compensate for offset variation due totemperature or other operating conditions. However, these circuitsusually require manually setting the offset initially and are limited bythe accuracy of the analog components.

SUMMARY OF THE INVENTION

The present invention is directed to a compensation system configured toprovide a digitally compensated representation of a first amplifiedanalog signal indicative of a first parameter based on the firstamplified analog signal and a second signal indicative of a secondparameter. The digitally compensated representation of the firstamplified analog signal is determined by applying a pre-storedcompensation factor to an offset adjustment calculation for the secondparameter to provide a compensated offset adjustment. The compensatedoffset adjustment is combined with an adjusted gain to provide an offsetand gain correction for weighting the first parameter and to provide adigitally compensated representation of the first parameter. Theadjusted gain can be determined by applying a pre-stored gain factordata to the second parameter. The compensation system can be implementedin hardware, software or a combination of hardware and software.

Another aspect of the present invention is directed to a compensationsystem (e.g. a DSP or ASIC) that compensates for offset and gain errorin an analog circuit, such as due to circuit operation and temperaturedeviation. The compensation system comprises a first register forstoring a temperature compensation factor calculation from a digitalrepresentation of a temperature and a temperature compensationcoefficient. The compensation system includes a second register forstoring an offset adjustment calculation from a digital representationof an amplified signal and a fine offset coefficient. A processorcombines the temperature compensation factor with the offset adjustmentto produce a temperature compensated offset adjustment which is storedin one of the first and second registers. The other of the first andsecond registers can be used for storing a calculated temperatureadjusted gain that is calculated from the digital representation of atemperature, and a gain coefficient. The temperature adjusted gain iscombined with the temperature adjusted offset to produce an offset andgain correction. The offset and gain correction can be applied to theamplified signal to provide a compensated representation thereof.

Still another aspect of the present invention is a method forcompensating for error associated with an analog circuit. The methodcomprises determining a temperature compensation factor from a digitalrepresentation of a temperature and a temperature compensationcoefficient. An offset adjustment is determined based on a digitalrepresentation of an amplified signal and a fine offset coefficient. Atemperature adjusted gain is determined from the digital representationof a temperature and a gain coefficient. An offset and gain correctionis determined based on the temperature compensation factor, the offsetadjustment, and the temperature adjusted gain. The offset and gaincorrection can be applied to a signal provided by the analog circuit tocompensate for error associated with the analog circuit.

BRIEF DESCRIPTION OF THE DRAWINGS

The foregoing and other aspects of the present invention will becomeapparent to those skilled in the art to which the present inventionrelates upon reading the following description with reference to theaccompanying drawings.

FIG. 1 is a block diagram schematically illustrating an amplifierimplemented with digital compensation in accordance with an aspect ofthe present invention.

FIG. 2 is a block diagram of the components of a digital compensationsystem in accordance with an aspect of the present invention.

FIG. 3 is a block diagram of an amplifier with a digital compensationsystem implemented in accordance with an aspect of the presentinvention.

FIG. 4 is a flow diagram illustrating a method in accordance with anaspect of the present invention.

FIG. 5 is a flow diagram of another method in accordance with an aspectof the present invention.

DETAILED DESCRIPTION

The present invention relates to systems and methods for providingdigital compensation to an amplifier or a sensor. The approach describedherein can compensate for offset and/or gain deviations caused byexternal or internal factors such as temperature or component mismatch.The present invention enables a system to be provided that minimizes thehardware required to perform the compensation functions. Using theapproach described herein, systems can be manufactured economically andefficiently compared to many other types of systems.

Referring to FIG. 1, there is illustrated a system 100 that can beimplemented in accordance with an aspect of the present invention. Thesystem 100 comprises a compensation system 104 that is coupled toreceive an amplified signal from an amplifier 102. The compensationsystem could be a Digital Signal Processor (DSP), an applicationspecific integrated circuit (ASIC) or other circuitry programmed and/orconfigured to perform the functions described herein. The compensationsystem 104 includes a control 106 for implementing an algorithm 108 thatprocesses an input signal from the amplifier 102. The compensationsystem 104 provides an output signal that is a digitally compensatedrepresentation of the input signal from the amplifier. The compensationsystem 104 can also provide a control signal to the amplifier 102. Forexample, the control signal from the compensation system 104 implementsa coarse level of compensation for the amplifier (e.g., coarse offsetand gain correction) in the analog domain and the algorithm 108implemented by the control 106 provides a fine level of compensation(e.g., in the digital domain).

For example, the amplifier 102 is an analog amplifier that receives ananalog input IN1 that is amplified and provided to compensation system104. IN1 can be provided by a sensor (not shown), such as a highprecision sensor (e.g., a weight sensor). The amplifier can be a highgain amplifier for amplifying IN1 to a desired level (e.g., having again greater than about 100, such as about 300 or more). In addition,compensation system 104 receives another input IN2 that represents aparameter indicative of compensation requirements for the amplifier 102.For example, the parameter may be an environmental parameter, such astemperature, or other factor that can affect gain and offsetcharacteristics of the amplifier 102.

Control 106 processes amplified IN1 and IN2 using algorithm 108 andprovides the output signal based on IN1 and IN2. The amplified IN1signal can include errors associated with operation of amplifier 102,such as gain errors and/or offset errors. These and other errorsassociated with amplifier 102 can be affected by environmental factors,such as temperature. Thus, by providing IN2 as an indication oftemperature or one or more other environmental factors, the compensationsystem 104 can correct for such errors in IN1 as a function of IN2. Itwill be appreciated that errors associated with amplifier 102 can becomeeven more significant where the amplifier is a high gain amplifier, asmay be needed to amplify signals from many types of sensors. Thealgorithm 108 thus employs IN2 to implement desired compensation onamplified IN1 so that OUTPUT is provided as a digitally compensatedrepresentation of IN1, which is a more accurate indication of theparameter indicated by IN1.

According to an aspect of the present invention, the digitallycompensated representation of IN1 is determined by algorithm 108applying a pre-stored compensation factor to an offset adjustmentcalculation for a parameter represented by IN2 to provide a compensatedoffset adjustment. The compensated offset adjustment is combined with anadjusted gain for amplifier 102 to provide an offset and gain correctionthat can be applied to a digital representation of IN1 for weighting thefirst parameter represented by amplified IN1. Compensation system 104 inturn provides an OUTPUT corresponding to the digitally compensatedrepresentation of the first parameter. The adjusted gain can bedetermined by applying a pre-stored gain factor to the second parameter.Additionally, compensation system 104 can employ IN2 to provide a coarselevel of gain and offset correction to amplifier 102. Based on thecoarse level of gain and offset correction (indicated as the feedback toamplifier 102), compensation system 104 can implement the fine gain andoffset correction digitally via control 106 and algorithm 108. Itfurther will be appreciated that compensation system 104 is equallyapplicable to single or multi-stage amplifiers.

FIG. 2 illustrates a compensation system 200 in accordance with anaspect of the present invention. Compensation system 200 comprises afirst input register 202 and a second input register 204. The registers202 and 204 store digital representations of corresponding analogsignals. For example, register 202 can store a digital representation ofan amplified sensor parameter (e.g., weight) and register 204 can storea parameter (e.g., temperature) that can affect offset and/or gainimplemented by the amplifier that provides the parameter to register202. Compensation system 200 also has general purpose registers GP1,GP2. The registers GP1 and GP2 are used for general purpose storage. Forexample, variables can be input into registers GP1 and GP2 for use incalculations and intermediate results can also be stored in them. Thecompensation system 200 also includes an arithmetic (or an adding) logicunit (ALU) a multiplication unit (MPU), ALGORITHM, and CONTROL 208. Theinput registers 202, 204 and the general purpose registers GP1, GP2 andlogic units ALU and MPU, ALGORITHM and CONTROL are connected via a bus206. The ALGORITHM also includes a SCALING component that is used toconvert values of variables to different scales and for aligning digitalrepresentations of the variables. For example, one variable on a firstscale is stored in GP1 and another variable on a second scale is storedin GP2. The scaling component can convert either GP1 and/or GP2 to acommon scale for processing by the ALU or the MPU. CONTROL 208 controlsprocessing of the algorithm as well as the loading and moving databetween the registers via bus 206 as needed by the algorithm.

As an example, CONTROL 208 could have the data at input register 202loaded into GP1, and store in GP2 another value to be combined with thevalue in GP1. CONTROL 208 can then employ SCALING component to performany scaling of GP1 and GP2 for the algorithm (e.g., by shifting theregister or by adding a constant for alignment) and then send the valuesin GP1 and GP2 to the ALU (for adding) or to the MPU (for multiplying).CONTROL 208 then directs the output from the ALU or MPU directed to oneof the general purpose registers GP1, GP2. As shown in FIG. 2, theoutput can be obtained from GP1; however, the output can be obtainedfrom GP2, or any other register, if desired. The output thus representsa digitally compensated version of the parameter provided to register202, corrected for gain and offset errors associated with an amplifier.

FIG. 3 illustrates another example of a system 300 that can beimplemented in accordance with an aspect of the present invention. Thesystem 300 includes an analog amplifier 302 and a DSP 304 forimplementing digital compensation of amplifier 302. For example, DSP 304is programmed and configured to implement gain and/or offset correctionfor amplifier 302 based on one or more of temperature and predeterminedoperating characteristics of the amplifier.

DSP 304 includes input registers INPUT 1 and INPUT 2 general purposeregisters GP1, GP2 and logic units ALU and MPU for performing additionand multiplication, respectively. The output of amplifier 302 isconverted to a corresponding digital representation by analog-to-digital(ADC) 306. ADC 306 provides the digital representation to DSP 304. Ananalog temperature signal is input into ADC 308, and the digitalrepresentation of the temperature is input DSP 304. For example, thetemperature signal can be provided by a temperature sensor, such as canbe provided based on current across a resistor or another temperaturesensitive device.

DSP304 also includes a coarse offset module (COARSE OFFSET) that sets acoarse level of offset for amplifier. COARSE OFFSET is connected todecoder 310 for providing a digital value corresponding to desiredoffset decoder 310 is coupled to variable capacitor 312 to establish acapacitance value that defines the COARSE OFFSET of amplifier 302. Othertypes of circuitry could also be employed to implement desired coarseoffset adjustments on amplifier 302. As shown, the coarse offset moduleis contained within DSP 304, however, coarse offset adjustment may beimplemented by other circuitry, such as another DSP, or even by ananalog process. The coarse offset can be preset, adjusted by thecompensation system, or be set by an analog process. The coarse offsetsetting can be stored in a programmable register associated with DSP304. The value of the coarse offset can, for example, be programmed intoa register, or it may be provided by a DAC (not shown) coupled to theanalog coarse offset signal. The range and step for coarse offset varybased on the range of the coarse offset and the number of bits providedfor the value of the coarse offset. For example, if the coarse offsethas 9 bits and covers the range: 125 mV-(−125 mV), which provides atotal range of 250 mV. Then coarse offset step (Costep) can berepresented as:${Costep} = {\frac{range}{2^{9}} = {488.281 \times 10^{- 6}{V.}}}$

By way of further example, variable capacitor 312 can be a capacitorbank. Decoder 310 sends a signal to set the capacitance of capacitor 312based on the signal provided by the coarse offset module. Non-volatilememory 314 (e.g., an EEPROM) stores compensation coefficients used byDSP 304 for calculating the compensation factors. The coefficients canbe programmed by the designer or manufacturer based on circuitry used toimplement the system 300.

In operation, the output from amplifier 302 is converted by ADC andstored in register INPUT1 in DSP 304. Temperature is converted to thedigital domain via ADC 308 and stored in register INPUT2 of DSP 304. DSP304 calculates the compensation for amplifier 302. The compensationfactors are computed by CONTROL employing the algorithm that isconfigured to access compensation coefficients from memory 314. ALU andMPU combines compensation coefficients with the data stored in registersINPUT1 and INPUT2 based on ALGORITHM. DSP 304 utilizes registers GP1 andGP2 to store intermediate results. The final result, corresponding to adigitally compensated representation of the amplified input signal, canbe stored in the OUTPUT register.

In view of the examples shown and described above, a methodology fordigital compensation in accordance with the present invention will bebetter appreciated with reference to the flow diagrams of FIGS. 4-5.While, for purposes of simplicity of explanation, a methodology is shownand described as executing serially, it is to be understood andappreciated that the methodology is not limited by the order shown, assome aspects may, in accordance with the present invention, occur indifferent orders and/or concurrently from that shown and describedherein. Moreover, not all features shown or described may be needed toimplement a methodology in accordance with the present invention.Additionally, such methodology can be implemented in hardware (e.g., oneor more integrated circuits), software (e.g., running on a DSP or ASIC)or a combination of hardware and software.

Referring to FIG. 4, there is illustrated a methodology 400 inaccordance with an aspect of the present invention. The methodology 400employs two parameters, namely an amplifier output signal indicative ofa first parameter (e.g., weight) and a signal indicative of a secondparameter (e.g., temperature), and determines a digitally compensatedrepresentation of the amplified output signal. At 402, a temperaturecompensation factor is computed. This factor can be computed bycombining the temperature with temperature compensation coefficients.The coefficients can be programmed by the designer or manufacturer basedon circuitry utilized to implement the methodology 400. At 404, anoffset adjustment is calculated. The offset adjustment is calculated byadding a fine offset adjustment factor to the amplifier output. The fineoffset adjustment factor can be programmed by the designer ormanufacturer. The fine offset adjustment factor, for example, can varyas a function of the step size of the coarse offset and/or the gain ofthe amplifier. At 406, a temperature adjusted gain is calculated. Thetemperature adjusted gain can be calculated by multiplying a gaintemperature coefficient with the temperature. The gain temperaturecoefficient can also be programmed by the designer or manufacturer. Theproduct of the gain temperature coefficient and temperature is added toa digital representation of the amplifier's gain. At 408, the offset andgain correction is computed by combining the temperature compensationfactor, offset adjustment, and the temperature adjusted gain. At 410,the offset and gain correction is combined with the amplifier outputsignal. The result provided at 410 is a digitally compensatedrepresentation of the amplifier output signal.

FIG. 5 illustrates another methodology 500 that can be implemented inaccordance with an aspect of the present invention. The methodology 500may be performed by a DSP to minimize size requirements. The first input(e.g., the output of a weight sensor) is amplified and converted to acorresponding digital representation by an ADC and input into acompensation system. The ADC, for example, provides a 14 bit digitalrepresentation (ADC scale) of the amplified sensor output. A secondinput (e.g., temperature) is converted by a second ADC that provides a12 bit digital representation of the temperature. Assume, for example,that the desired output is a 10 bit digital word. For this example, thevalue of the least significant bit (LSB) of the digital temperaturevalue is 0.038° C. and the value of the LSB of the digital, amplifiedsensor signal is 305.2 μV.

In addition, the system is provided with programmable parameters for aninput offset trim range, first and second temperature compensationcoefficients, gain, and a gain temperature compensation factor. Forexample, the input offset trim range (Vos) has a range from −120 to 120mV, an offset trimming step of 2 μV, and a trimming resolution of 17bits. A first temperature compensation factor (TC1) can have an inputoffset trim range of approximately −2 to 2 μV/deg C., a trim step ofabout 40 nV/deg C., and a 7 bit resolution. A second temperaturecompensation factor (TC2) has a range of −37 to 37 μV/° C.², a trim stepof about 0.62 nV/deg C.², and is represented digitally by 7 bits. Theprogrammable gain range (GAIN) is 75 to 125% with a gain programmingstep of 0.1% and a programming resolution of 9 bits. The gaintemperature compensation factor (TCGAIN) ranges is from −900 to 0 ppm/Cwith a trimming step of 15 ppm/C and a 6 bit resolution.

For this example, coarse offset compensation of the amplifier isperformed in the analog domain based on a digitally selected value.Assume that the coarse offset is represented digitally by 9 bits andcovers the range from −125 mV to +125 mV (a range of 250 mV). Therefore,the coarse offset step (Costep) can be computed as:${Costep} = {\frac{range}{2^{9}} = {488.281 \times 10^{- 6}{V.}}}$

In this example, analog domain introduces errors due to matching incapacitors in the DAC, such as approximately ±3 Isbs. Assuming for thisexample that the analog gain (Av) is approximately 300. The coarsedeviation equals Costep *3=1.465×10⁻³V. The deviation times the analoggain is 1.465×10⁻³V *300=0.439V.The coarse error (coerr) can be represented as:${coerr} = {{{coarse}\quad{deviation}*2*{Av}} + {\frac{Costep}{2}.}}$Using the values of this example, coerr=0.879V.

One approach to implement the digital corrections would be to make allof the scales binary multiples of each other based on the highestresolution scale (which for this example is the ADC scale, 14 bits).This way the codes and their shifts can easily be manipulated and theonly loss of resolution occurs when the values are converted to the 10bit output scale.

At 502, the first input parameter (e.g., a 12 bit digital representationof temperature) is stored. At 504, the second input parameter (e.g., a14 bit digital representation of the amplifier output, such as from anADC) is stored.

The temperature coefficient calculations (the combination of 506, 508and 510) for offset will now be described. The temperature coefficientcalculations deal not only with voltage on the ADC scale, but alsotemperature on the degree scale.

The temperature calculations can be performed as:DEG*(TC1+TC2*DEG),where DEG is the temperature in degrees Celsius, TC1 and TC2 aretemperature coefficients, such as mentioned above. The calculation canbe done this way in order to save a calculation step. The result can beresolved to the scale of the ADC at the end of the calculations tominimize translation error.

The calculations at 506-510 can be performed independently whenever thetemperature is updated and saved for the offset correction step or doneeach time the first input parameter is updated as part of the overallcalculation.

At 506, the second input parameter stored at 504 is multiplied by thetemperature compensation coefficient (TC2). TC2 can be programmed by thedesigner or manufacturer. The result can be stored in a general purposeregister.

Using the above example parameters, TC2 has an input referred step of0.62 nV/deg C. The step size for TC2 (Tc2step) after factoring in thegain of the amplifier is:Tc 2step=Tc 2 vosSpec·Av, or Tc 2step=186×10^(−9.)Assume codes for TC2 are represented by 7 bits 2's complement values,with a range from −64 to +63 and the LSB is equal to the tc2step valuejust calculated, namely 186×10⁻⁹V/deg C. In this example, thetemperature codes are 12 bits with a range of 100 to −55 deg C.Therefore, the temperature step value (tempstep) can be represented as:${Tempstep} = {\frac{155}{2^{12}} = {0.038{{{^\circ}C}.}}}$After the code for the temp coefficient is multiplied with thetemperature, the output (Tt2step) would have a scale of:Tt 2step=Tempstep·tc 2step=7.039×10⁻⁹ volts/deg C.,is the value of the LSB.

At 508, temperature coefficient (TC1) is scaled to the same scale of theresult of TC2*temperature (e.g., 28 bits). The scaled representation ofTC1 can be stored in a general purpose register. To convert TC1 to theTC2 scale, which is a finer scale, generally requires adding bits to theright hand side of the binary point on the 7 bit TC1 code andmultiplying by an appropriate scale factor.

A code of 1 would have a step value (tc1step) on the TC1's originalscale (tc1scale) that can to be mapped onto the tt2step scale, by usingthe formula:code*tc 1step=newcode*2tt 2step.A maximum code on the tc1 scale would exist when tc1 code=−64. Thisresults in:${tt2code} = {{{floor}\left( {{tc1code} \cdot \frac{tc1step}{tt2step}} \right)} = {- 109114.}}$

The number of bits required for performing the above calculationcorresponds to:${{tc1code} \cdot {tc1step}} = {{- 0.001} = {{{ceil}\left( \frac{\log\left( {{tt2code}} \right)}{\log(2)} \right)} = 17.}}$

Therefore, 17 bits are needed to hold this max value.

As previously calculated in this example, tt2step=7.039×10⁻⁹ and tc1step−12×10⁻⁶ In order to align the bits of TC1 to tt2step, TC1 is multipliedby: ${{Floor}\left( \frac{tc1step}{tt2step} \right)} = 1704.$TC1 would have to have bits added on the right of the binary point whenmultiplying by this scale factor. Then, TCScaleConst·tt2step=11.994×10⁻⁶The error (Err) introduced by this conversion can be expressed as:Err=|TCScaleConst·tt 2step−tc 1step|,resulting in error equal to about 6.27×10⁻⁹ error per bit. The error inthe ADC scale can be expressed as:$\frac{Err}{adcstep} = {20.544 \times 10^{- 6}}$

The maximum error from this scaling will be at either the maximumnegative or positive code such as: error·64=401.25×10⁻⁹.

At 510, scaled TC1 is then added to the product of TC2 and temperaturefrom 506. Using the example parameters, the maximum value of thiscalculation would provide at most 20 bits. The result can be scaled to14 bits in preparation for multiplication by temperature, as performedat 512.

Such scaling to 14 bits can be performed by a right shift of 6 bits suchthat the lower 14 bits places the volts in the desired scale. The shiftstep (tt2Shfitedstep) can be represented as:tt 2Shiftedstep=tt 2step·2⁻⁶=450.469×10⁻⁹.The above value of tt2Shiftedstep corresponds to the value of the LSB ofa right shifted scale by 6 bits, and then taking the lower 14 bits.

The error mapped to the ADC scale from this calculation can be expressedas: $\frac{tt2Shiftedstep}{adcstep} = {1.476 \times 10^{- 3}}$

The maximum error is at the maximum possible code for this calculationor when: TC1=−64; TC2=−64; and the Temperature=100 deg C. This error canbe calculated as:tt 2Shiftedstep·Tempstep=17.047×10⁻⁹.

At 514, the fine offset coefficient (VOSFINE) is scaled to the scale ofthe digital representation of the amplifier output ADC scale (e.g., 14bits). In the present example, it is assumed that the code for VOSFINEis 0 to 255 unsigned. The coarse offset step size is about 2 μV inputreferred. Multiplying VOSFINE by the gain in the signal path producesthe value of the offset at the amplified sensor output of the ADC.Multiplying VOSFINE by the gain introduces an error (voserr) into thecalculations. This error (voserr) can be represented as:voserr=5 10⁻³ Av; voserr=150×10⁻³,which equals the output referred maximum value. The step value of theoffset (offsetstep) becomes:offsetstep=2 10^(−6*) Av=600×10⁻⁶.

The offsetstep is also the value of the offset LSB. However, as notedabove, the ADC scale is on a different scale. The ADC LSB (adcstep) is:${adcstep} = {{\frac{5}{2^{14}}\quad{adcstep}} = {305.176 \times {10^{- 6}.}}}$

Thus, the fine offset value cannot just be added to the amplified outputvalue since they are not on the same scale, nor are they binarymultiples of each other. The offset code thus can be converted to theADC scale before being added to the amplified output value. Recall thatthe offset code was previously calculated as: offstep=600×10⁻⁶. Toconvert the offset value to the ADC scale, the conversion factor is:$\frac{offsetstep}{adcstep} = 1.966$By moving the ADC binary point Y bits this code provides:${{{ceil}\left( {\frac{offsetstep}{adcstep} \cdot 2^{6}} \right)} = 126},$therefore, Y=6.A constant (CONSTVOS) for multiplying the fine offset value to convertit to the ADC scale can be expressed as:${CONSTVOS} = {{{ceil}\left( {\frac{offsetstep}{adcstep} \cdot 2^{Y}} \right)} = 126.}$

Multiplying the fine offset by this factor would scale the offset to avalue close to the ADC scale shifted by Y bits.

Converting from the ADC scale to the VOS scale can be performed by usingthe formula (newcode*scale1=oldcode*scale2). The voscode is multipliedby a scale factor VOSCONST and the new code is added to the value of theALU which has been shifted by the shift factor (vcode). This scaling canbe expressed as:vcode*CONSTVOS*adcstep·2⁻⁶=153.208×10⁻³;and vcode*offsetstep=0.153.The maximum error due to the truncation of the scale factor on the adcscale, where Voff=2⁸; offsetstep=6×10⁻⁴; and adcstep=3.052×10⁻⁴ can beexpressed as:$\frac{{{{voff} \cdot {offsetstep}} - {{voff} \cdot {CONSTVOS} \cdot \left( {{adcstep} \cdot 2^{- Y}} \right)}}}{adcstep} = {0.684\quad{{lsbs}.}}$Thus, for the example given, to scale VOSFINE to the output scale,VOSFINE is multiplied by 126. At 516, the scaled fine offset (VOSFINE)is added to the amplified sensor output. The amplified sensor output canbe sign extended for the addition. The LSB of the result of the additionis 4.768 μV.

The result of the addition is right shifted arithmetically by 6 bits sothat the value of the LSB is approximately 305.2 μV.

At 518, the total temperature compensation term(TC2*temperature+TC1)*temperature, is scaled to align with the ADCscale. The temperature compensation term is left shifted by 10 bits,making the value of the LSB 27.7 pV. An additional scaling factor, aconstant of about 98 can be multiplied by the shifted temperaturecompensation term to align the bits to the ADC scale. The result isright shifted by 10 bits, making the 10^(th) bit's value 298 nV.

At 520, the scaled temperature compensation term (calculated at 518) isadded to the offset adjusted output (calculated at 516). Because theoffset adjusted output's LSB is 305.2 μV, it is left shifted 10 bits foradding, making its LSB 298 nV, the same as the scaled temperaturecompensation term. The addition is then performed and the result isright shifted by 10 to convert the result back to the ADC scale (LSB=305.2 μV).

Gain calculations and scaling are performed at 522, 524, 526 and 528. Byway of example, gain can be stored in a programmable register of 9 bitsrepresenting 75% to 125% of desired gain in steps of 0.1% (e.g., 75 to1.25 in 0.001 steps). The gain temp correction (TCGAIN) is stored in aprogrammable register with 6 bits covering a range of 900 ppm to 0 ppm,in steps of 15 ppm/C.

The codes for gain (gain codes) can represent amplifier gain from 0 to511. The gain codes can be represented in 2's complement codes with 0meaning gain of 1. For an uncorrected case the gain can be calculatedas:1+gaincode*0.001,

-   -   where gaincode may vary from −256 to 255.        If a code on the ADC scale is multiplied by the gain factor        code, the result would be on the ADC scale. The maximum error        can be calculated using the maximum values for adcCode and gain.        For example, if adcCode=255, then addcstep·acdCode=0.07, and        adcstep=305.176×10⁻⁶. If the gain=1.25 (the maximum value for        gain), then gain·adcstep·adcCode=97.275×10⁻³. Setting the        gaincode to the maximum value (e.g., gaincode=255), then        gaincode0.001+1=1.255. The gain step (gstep)=0.001, then        gaincode·gstep+1=1.255×10⁻³,        floor[adcCode·(gaincode·2⁻¹⁰+1)]=318 and        318·adcstep=97.046×10⁻³.        Therefore, the maximum error is can be expressed as:        $\frac{\begin{matrix}        {{\left( {{gain} \cdot {adcstep} \cdot {adcCode}} \right) -}} \\        {{{adcCode} \cdot \left( {{{gaincode} \cdot 2^{- 10}} + 1} \right) \cdot {adcstep}}}        \end{matrix}}{({adcstep})} = {249.023 \times 10^{- 3}}$

The gain is then combined with the temperature calculations that wereperformed at 506-512. When the 15 ppm step of this example is multipliedby the temperature, the value of the resultant value is unitless likethe gain but value of the LSB is not the same as the gain code stepcalculated above. For a specific ambient temperature and gain code, theadjustment can be calculated to the gain for temperature correction. Tofacilitate adding this to the gain code for the non-temperaturedependent gain adjustment, the two codes should be on the same scale.

By way of further example, the TCGAIN step (TCGstep)=15·10⁻⁶, then theresulting scale becomes TCGstep·Tempstep=567.627×10⁻⁹. Further, assumethat Tcg1step=TCGstep·Tempstep, that the gain step, (Gainstep)=2⁻¹¹, andthat Tcg1step·2¹¹=1.162×10⁻³. Thus, the closest value on the temperaturescale to the gain step scale is between the 10^(th) and 11 bits of thegain step scale. This provides that gainsstep·2⁻¹¹=238.419×10⁻⁹.

So a corresponding binary factor on the gain scale would be 2⁻¹¹ or2⁻¹¹=488.281×10⁻⁶. To get a closer factor on the gain scale, the factorwould have to be non-binary and additional bits would be required. Forexample, $\frac{\frac{1}{2048}}{tcg1step} = 860.215$where: tcg1step=567.627×10⁻⁹ and$\frac{1}{2048} = {488.281 \times 10^{- 6}}$Using the smaller scale for the add function, the gain code could beshifted left by 11 bits first and the two values then added to provide atemperature adjusted gain. The error in doing this would be thedifference in the two scales in LSBs is TCGCODE=−63$\left\lbrack {\frac{\left( {{tcg1step} - {{adcstep} \cdot 2^{- 11}}} \right) \cdot {TCGCODE}}{adcstep}} \right\rbrack = {0.086\quad({lsbs})}$Using the maximum possible values in this example, Atemp=100;TCGAIN=−64; and Tempstep=0.038, then the maximum possible error becomes:[(Atemp−25)·TCGAIN·TCGstep]=−0.072.

At 522, the gain temperature coefficient (TCGAIN) is multiplied by thetemperature (TCGAIN*GAIN). The result has a LSB value of 567×10⁻⁹.

At 524, the result of the TCGAIN*GAIN calculation is scaled to the Gainscale. The TCGAIN*GAIN LSB value is 567×10⁻⁹. By multiplying by aconstant of 9, the scale is converted so that the LSB is 61×10⁻⁹.

At 526, the scaled value of TCGAIN*GAIN is added to the Gain. The gainscale also has a LSB of 61×10⁻⁹. The 11^(th) bit has a value of 1×10⁻⁶,by shifting the result of the add to the right by 10 bits, the LSB ofthe result is 1×10⁻⁶.

At 528, the temperature adjusted gain is adjusted to the ADC scale. At530, the temperature adjusted gain (from 528) is multiplied by theoffset adjusted output (from 520) to provide a digital offset and gaincorrection. The offset adjusted output is left shifted by 10 to align itwith the temperature adjusted gain. For this calculation, themultiplicand is 24 bits. The result is right shifted by 10 bits torealign the result with the ADC scale, namely the LSB=305.2 μV.

At 532, the gain and offset correction factor is then converted to a 10bit scale, the desired output scale of this example. The conversion canbe performed by multiplying the offset and gain correction by a constantof 1924. A constant of 366 can be added to the 10 bit representation ofthe offset and gain correction to center the values on the new scale.

At 534, the output register is loaded with the result. The result may bepassed through limiting logic in order to limit how much correction isallowed. A signal can be sent after the register is loaded so anexternal process can determine when the calculation is done.

What has been described above includes exemplary implementations of thepresent invention. It is, of course, not possible to describe everyconceivable combination of components or methodologies for purposes ofdescribing the present invention, but one of ordinary skill in the artwill recognize that many further combinations and permutations of thepresent invention are possible. Accordingly, the present invention isintended to embrace all such alterations, modifications and variationsthat fall within the spirit and scope of the appended claims.

1. A system for signal processing, comprising: a compensation systemconfigured to provide a digitally compensated representation of a firstamplified analog signal indicative of a first parameter based on adigital representation of the first amplified analog signal and adigital representation of a second signal indicative of a secondparameter, the digitally compensated representation of the firstamplified analog signal being determined by applying a pre-storedcompensation factor to an offset adjustment calculation for the secondparameter to provide a compensated offset adjustment, the compensatedoffset adjustment being combined with an adjusted gain to provide offsetand gain correction for weighting the first parameter to provide thedigitally compensated representation of the first parameter.
 2. Thesystem of claim 1, the adjusted gain being determined by applying apre-stored gain factor to the second parameter.
 3. The system of claim1, the first parameter is weight and the second parameter istemperature.
 4. The system of claim 1, further comprising a scalingcomponent that scales the digital representation of the first amplifiedanalog signal to a first scale and scales the digital representation ofthe second signal to a second scale, the compensation system convertingat least one of the digital representation of the first amplified analogsignal and the digital representation of the second signal to a scalethat is compatible with the first and second scales.
 5. The system ofclaim 4, the compensation system converting the offset and gaincorrection to an output scale that is different from the first andsecond scales.
 6. The system of claim 1, the compensation systemcomprising a digital signal processor (DSP).
 7. The system of claim 6,pre-stored compensation factor and the pre-stored gain factor data arestored in a memory associated with the DSP.
 8. The system of 1, furthercomprising an analog amplifier that provides the first amplified signal.9. The system of claim 8, further comprising a digital-to-analogconverter (DAC) for converting a coarse correction signal correspondingto an analog coarse offset and gain correction signal that is providedto the amplifier for implementing coarse offset and gain correctionbased on the second parameter.
 10. The system of claim 9, thecompensation system further comprising a programmable component forsetting a coarse offset, the compensation system providing the coarsecorrection signal to the amplifier for implementing the coarse offsetand gain correction.
 11. The system of claim 10, the compensation systemfurther comprising an algorithm for implementing a digital fine offsetand gain correction compensation on the first amplified analog signal toprovide the digitally compensated representative of the first parameter.12. A compensation system that implements offset and gain correction foran analog circuit, comprising: a first register that stores atemperature compensation factor based on a digital representation of atemperature and a temperature compensation coefficient; a secondregister that stores an offset adjustment calculation from a digitalrepresentation of an amplified signal and a fine offset coefficient; anda processor that produces a temperature compensated offset adjustmentbased on the temperature compensation factor and the offset adjustment,the processor storing the temperature compensated offset adjustment inone of the first and second registers, the other of the first and secondregisters storing a calculated temperature adjusted gain based on thedigital representation of the temperature, and a gain coefficient, theprocessor employing the temperature adjusted gain and the temperaturecompensated offset adjustment to provide an offset and gain correction.13. The compensation system of claim 12, further comprising memory thatcontains at least some of the temperature compensation coefficients, thefine offset coefficient, and the gain coefficient.
 14. The compensationsystem of claim 12, the digital representation of the amplified signalis scaled to a first scale and the digital representation of atemperature is scaled to a second scale, the processor converting atleast one of the digital representation of the first amplified analogsignal and the digital representation of the temperature to a compatiblescale.
 15. The compensation system of claim 12, further comprising: ananalog amplifier that provides the amplified signal; and ananalog-to-digital converter that converts the amplified signal to thedigital representation of the amplified signal, the processor employingthe offset and gain correction to provide a digitally compensatedrepresentation of the amplified signal.
 16. The compensation system ofclaim 15, the analog amplifier having a gain greater than about onehundred.
 17. The compensation system of claim 15, further comprising acoarse offset module that provides a coarse offset adjustment signal tothe analog amplifier for implementing a coarse error correctionassociated with the analog amplifier, the offset and gain correctionprovided by the compensation system corresponding to a fine errorcorrection associated with the analog amplifier.
 18. A system for signalprocessing, comprising: means for providing a digital representation ofa first amplified analog signal indicative of a first parameter; meansfor providing a digital representation of a second analog signalindicative of a second parameter; means for applying a pre-storedcompensation factor to an offset adjustment calculation employing thesecond parameter to provide a compensated offset adjustment; means fordetermining an adjusted gain based on a prestored gain factor and thesecond parameter; and means for combining the compensated offsetadjustment with the adjusted gain to provide offset and gain correction;and means for weighting the first parameter employing the offset andgain correction to provide a digitally compensated representation of thefirst parameter;
 19. The system of claim 18, further comprising meansfor scaling the digital representation of the first amplified analogsignal to a first scale and for scaling the digital representation ofthe second analog signal to a second scale; and means for converting atleast one of the digital representation of the first amplified analogsignal and the digital representation of the second analog signal to ascale that is compatible with at least one of the first and secondscales.
 20. The system of claim 18, the compensation system furthercomprising means for implementing the offset and gain correction as adigital fine offset and gain correction compensation on the firstamplified analog signal.
 21. A method for compensating for error in ananalog amplifier, comprising: determining a temperature compensationfactor based on a digital representation of a temperature and atemperature compensation coefficient; determining an offset adjustmentfor a digital representation of an analog amplifier signal based on afine offset coefficient; determining a temperature adjusted gain for theamplifier based on the digital representation of a temperature and again coefficient; and determining an offset and gain correction based onthe temperature compensation factor, the offset adjustment, and thetemperature adjusted gain.
 22. The method of claim 21, furthercomprising applying the offset and gain correction to the digitalrepresentation of the amplified signal to provide a digitallycompensated representation of the analog amplified analog signal. 23.The method of claim 21, further comprising scaling the temperaturecompensation factor to match the scale of the offset adjustment.
 24. Themethod of claim 21, further comprising combining the temperaturecompensation factor and the offset and adjusting the combinedtemperature compensation and offset adjustment having a scale and;converting the temperature adjusted gain to a scale that matches thescale of the combined temperature compensation factor and the offsetadjustment.
 25. The method of claim 21, further comprising storing thetemperature compensation factor in a first register, and storing-theoffset adjustment in a second register.
 26. The method of claim 25,further comprising: combining the offset adjustment with the temperaturecompensation factor to produce a temperature compensated offsetadjustment; and storing the combined offset adjustment with thetemperature compensation factor in a one of the first and secondregisters.
 27. The method of claim 26, further comprising storing thetemperature adjusted gain in a one of the first and second registersthat does not contain the combined offset adjustment with thetemperature compensation factor.